4-bit shift register

The 4-bit shift register is a simple circuit that suitably demonstrates the aspects of sequential logic design discussed above. Like the multiplexer example in Chapter 4, a number of different design methods are illustrated for the same circuit. Also, other new constructs are introduced as more complex flip flop functions are developed. Again, all the VHDL descrip-... 

A structural style description of the 4-bit shift register can be constructed in two ways. The most straightforward approach is to instantiate storage elements with the required functionality from vendor-supplied libraries. If the required type of flip flop is not available, the designer may choose to construct a component with the required function using a behavioural description. Ultimately, this approach will still produce a circuit with storage elements extracted from a vendor s library along with some combinational... 

Figure 5.11 Regular and irregular Generate statement architectures for creating die 4-bit shift register.

Each of the behavioural architectures consists of a process that describes a particular variant of the 4-bit shift register and an output inverter. These are two concurrent statements that will appear at the top level of the synthesized circuit. All behavioural architectures except SIMPLE employ an external initialization signal called INIT and therefore only SIMPLE has a different top-level circuit. Figure 5.13a shows the top level of SIMPLE and Figure 5.13b shows the same for all the other behavioural architectures. In each case the block represents the Process statement, the output of which is fed into an inverter. 

The structural architectures demonstrated the use of manual and generated component instantiatiotrs in the creation of the 4-bit shift register A component instantiated from a vendor s library will always be optimized. It is therefore appropriate in these examples to instantiate the optimized versions of the D- and JK-type flip flops. 

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